Meng-Kai Shih; Weihong Lai; Tsewei Liao; Karen Chen; Dao-Long Chen; C. P. Hung
Heterogeneous integration makes it possible to integrate multiple separately manufactured components into a higher-level assembly with enhanced functionality and improved operating characteristics. Advanced packages include 2.5D integrated circuit, fan-out chip-on-substrate chip-first, and FOCoS chip-last.
This study constructs a nonlinear three-dimensional simulation model to explore warpage, extreme low-k interconnect stress, redistribution-layer trace stress, and board-level solder-joint reliability across all three packages.
The model is validated by comparing numerical results for in-plane dimensional change of a FOCoS chip-last package with experimental observations over 30 °C to 260 °C. The thermal performance, measured as junction-to-ambient thermal resistance, of the three packages is then examined and compared.
Finally, factorial designs with analysis of variance examine the effects of the main structural parameters of the FOCoS chip-last package on thermomechanical reliability under typical thermal-loading conditions. A thinner polyimide layer improves package reliability by minimizing coefficient-of-thermal-expansion mismatch between the polyimide layer and RDL trace.
Published in: IEEE Transactions on Components, Packaging and Manufacturing Technology, Volume 12, Issue 2, February 2022
