FCCSP
A thin, light chip-scale package for roughly 200 I/Os or fewer, with optional over-molding for chip protection and board-level reliability.
Other Packaging
Flip Chip Packaging
Flip chip turns the die toward its substrate and replaces peripheral bonding wires with area-array solder or gold bumps, shortening signal paths, increasing I/O density, and enabling smaller, lower-profile packages.
A direct die-to-substrate connection
Because I/O pads can be distributed across the die surface, flip chip can shrink silicon area and optimize circuit routing. Removing long bonding wires also reduces signal inductance.
Wafer bumping is the essential upstream process: solder, copper-pillar, or other bumps are formed before the wafer is diced, creating the electrical, mechanical, and thermal connection used during package assembly.
Benefits of flip chip
- All interconnects are bonded in one assembly operation
- Area-array pads increase signal density and can reduce die size
- Short paths improve high-frequency electrical performance
- The die back supports a direct heat-sink path
- No wire loop is required, enabling a lower package profile
ASE Flip Chip packaging offerings
Flip Chip Organic BGA
Laminate and build-up organic substrates provide strong electrical performance for high-frequency computing, network, and communications products.
Flip Chip Ceramic BGA
Alumina substrates improve moisture resistance, insulation, and thermal conductivity for high-reliability commercial applications.
HFCBGA
A copper, aluminum, ceramic, or AlSiC heat spreader lowers junction-to-case resistance and improves the effectiveness of external cooling.
