eWLB / aWLP
A chip-first, face-down wafer-level platform for baseband, RF, codec, power-management, and automotive-radar products.
Other Packaging
Fan-Out Packaging
Fan-Out packaging redistributes connections beyond the die surface, enabling more I/O, finer routing, a thinner profile, and flexible single- or multi-die integration without a conventional package substrate or full interposer.
What is Fan-Out Packaging?
Known-good dies are placed on a temporary carrier or reconstituted wafer or panel, embedded in mold compound, and connected through redistribution layers formed over both the chip and the surrounding fan-out area.
Unlike fan-in WLP, the available I/O field is not limited to the die surface. Connections can route outward across the molded area, supporting more external I/Os and a thin true chip-scale package.
ASE Fan-Out package offerings
FOCoS
High-density chip-on-substrate integration for networking and servers.
M-Series
A chip-first, face-up option for RF, baseband, PMIC, and codec products.
FOSiP
A multilayer RDL System-in-Package platform for RF, front-end, power, and MCU integration.
FOPoP
A vertically integrated fan-out package-on-package for application processors and memory.
Panel Fan-Out
Panel-scale chip-first and chip-last processing for low- and high-density RF, power, FEM, and server packages.
Applications
High-volume fan-out serves PMICs, RF packages, baseband processors, and networking systems that need energy-efficient, thin, small-form-factor integration.
New high-frequency opportunities include 76–81GHz automotive radar, 5G backhaul and fronthaul above 20GHz, 60GHz WiGig, and antenna-in-package modules.
