Advanced Packaging
Heterogeneous Integration
Heterogeneous integration combines separately manufactured chips, packages, passives, sensors, and other components in one higher-level assembly, delivering system functionality that is increasingly difficult to achieve with a single monolithic IC.
Overview
What is Heterogeneous Integration?
ASE uses advanced packaging to integrate components designed and manufactured with the process technology best suited to each function.
The components may differ in system level, function, and technology: specialized processors, DRAM, flash memory, surface-mount passives, filters, connectors, MEMS devices, sensors, and pre-assembled subsystems can all participate in the same package.
Bringing multiple dies together in a System-in-Package enables a compact assembly to perform a specific, advanced function while avoiding the cost and design complexity of forcing every function into one SoC.
Why heterogeneous integration matters
Combining chips made at different process nodes sustains the improvement in functional density and cost-performance as traditional scaling becomes more difficult.
- Higher performance and lower latency
- Smaller size and lower system weight
- Lower power requirement per function
- Greater design flexibility and a lower cost per function
Roadmap and solution platform
The Heterogeneous Integration Roadmap identifies the system-level integration and packaging technologies needed by AI, 6G, edge and cloud computing, data centers, autonomous vehicles, and wearable products.
ASE's platform builds on decades of packaging and SiP development, including copper interconnect, flip chip, wafer-level and fan-out packaging, 2.5D/3D IC, embedded die, MEMS, and sensor technologies for mobile, IoT, HPC, and automotive markets.